In the ever-evolving landscape of semiconductor design, chiplets have emerged as a revolutionary paradigm, reshaping the architecture of system-on-chip (SoC) systems. Central to this transformation is the Bunch of Wires (BoW) standard, which is redefining die-to-die interconnects with its efficiency and versatility. This article delves into the profound impact of BoW on semiconductor integration, exploring its key features, applications in AI workloads, industry support, and its pivotal role in revolutionizing parallel interfaces.
Introducing BoW: Revolutionizing Chiplet Connectivity
- Chiplets Offer Scalability: Chiplets, comprising interconnected dies within a single package, provide a scalable and efficient alternative to traditional SoC architectures.
- Industry’s Adoption: The industry’s strong support for chiplets is evident, with substantial investments and collaborations driving their adoption across diverse computing domains.
- Introduction of BoW: BoW, developed by Eliyan Corporation and endorsed by the OCP, revolutionizes chiplet connectivity with its groundbreaking interconnect technology.
- BoW’s Innovation: Unlike conventional methods reliant on advanced packaging, BoW utilizes standard organic substrates, significantly reducing manufacturing costs and simplifying integration processes.
Unveiling BoW: Versatility and Flexibility Redefined
- Versatile Solutions: BoW offers a spectrum of solutions tailored to diverse application requirements, ranging from basic BoW-Base for short-range communication to high-speed BoW-Turbo for long-distance connectivity.
- Backward Compatibility: BoW’s backward compatibility ensures seamless integration with existing standards, laying a future-proof foundation for innovation and interoperability in the chiplet ecosystem.
Support from Industry Leaders:
Version 1.0 of the BoW specification was approved and released in July 2022, leading to the rapid adoption of BoW across multiple process nodes ranging from 65nm to 5nm.
Companies using or supporting BoW:
- Netronome (SmartNIC)
- Blue Cheetah Analog Design
- eTopus and QuickLogic (eFPGA Chiplet template)
- Samsung (foundry)
- NXP (BoW PHY design)
- Keysight (test and measurement)
- Ventana Micro Systems
- DreamBig (hyperscale Smart NIC/DPU chiplet)
- d-Matrix (AI compute platform)
Blue Cheetah Analog Design and d-Matrix have successfully fabricated BoW test chips, showcasing the widespread adoption of BoW technology.
BoW in AI Workloads:
- d-Matrix’s adoption of BoW showcases its potential for energy-efficient AI computing, highlighting the scalability and efficiency of chiplet-based designs.
- BoW’s seamless integration with heterogeneous architectures on standard organic substrates drives innovation in data centers and cloud computing.
Impact of BoW in Parallel Interfaces:
- Scalable and Efficient Solution: BoW’s impact on parallel interfaces is significant, offering scalability and efficiency in chiplet connectivity.
- High Bandwidth Density and Low Power Consumption: BoW provides high bandwidth density and low power consumption, facilitating seamless communication among chiplets in parallel computing systems.
- Compatibility with Diverse Packaging Technologies: BoW’s compatibility with diverse packaging technologies enhances its versatility, making it the preferred choice for next- generation parallel interfaces.
More Information:
- A Sneak Peek at Chiplet Standards: https://www.edn.com/a-sneak-peek-at-chiplet-standards/
- Startup Aims to Improve Chiplet Packaging: https://www.eetimes.com/startup-aims-to-improve-chiplet-packaging/
- Parallel Interfaces in Chiplet Interconnections: https://www.mdpi.com/2079-9292/9/4/670
- Chiplets Advancing One Design Breakthrough at a Time: https://www.ednasia.com/chiplets-advancing-one-design-breakthrough-at-a-time/
- OCP Bunch of Wires: A New Open Chiplets Interface for Organic Substrates: https://fuse.wikichip.org/news/3199/ocp-bunch-of-wires-a-new-open-chiplets-interface-for-organic-substrates/
- Die-to-Die Interconnects using Bunch of Wires (BoW): https://semiwiki.com/ip/blue-cheetah-analog-design/317321-die-to-die-interconnects-using-bunch-of-wires-bow/
- BoW PHY Specification: https://opencomputeproject.github.io/ODSA- BoW/bow_specification.html