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Direct Programming Interface (DPI) is a mechanism that allows System Verilog to call functions or tasks written in C/C++ and vice versa. DPI enables the integration of custom C/C++ code with System Verilog, facilitating advanced verification tasks that are difficult or inefficient to achieve…

10 Sep

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Verification Methodology Basics & UVM

ASIC Verification has largely shifted its focus from the legacy procedural approach of building test benches to the more advanced object-oriented layered test bench architecture. It was imperative to find…

10 Sep

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UVM Environment: An Introduction

Verification is a complex process. It consumes about 80% of the time and effort that goes into a typical ASIC cycle. With the rise in complexity of designs and an…

10 Sep

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The ‘Inconclusive’ Customer: From Our Sales Diaries

We all have had our share of moments when ‘someone’ or ‘something’ just drives us to our wit’s end. It could be a bug hard to catch and even fix…

10 Sep

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SystemVerilog Concepts: Polymorphism

An insatiable hunger for smarter, sleeker and power efficient electronics has put tremendous pressure on research and implementation of ASICs that fit the bill. While ASIC design is continuously under…

10 Sep

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SystemVerilog Concepts: All About Semaphores

Challenges faced by the Verification industry Design engineers are already facing the heat owing to the unquenchable demands for faster, sleeker and smarter electronics. While they burn the midnight oil…

10 Sep

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SystemVerilog and the OOPS Concepts

SystemVerilog is primarily and extensively used as a Hardware Verification Language (HVL). Also known as Super Verilog, it encompasses Verilog, VHDL and OOPS (Object Oriented Programming) concepts. As the designs…

10 Sep

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Verification and Augmented Verification

Verification is a process that ensures that the given design functions as per specifications. When we use the word ‘functions’, we also imply that the timing, form factor and power…

9 Sep

Case Studies

D2D Layered Architecture

Layered architecture refers to a design methodology that divides the functionality of an integrated circuit (IC) into distinct layers, each responsible for a specific aspect of the design. This approach…

9 Sep

Case Studies

Impact of BoW in Chiplet Industry

In the ever-evolving landscape of semiconductor design, chiplets have emerged as a revolutionary paradigm, reshaping the architecture of system-on-chip (SoC) systems. Central to this transformation is the Bunch of Wires…

9 Sep

Case Studies

Impact of BoW in ChipletIndustry

In the ever-evolving landscape of semiconductor design, chiplets have emerged as a revolutionary paradigm, reshaping the architecture of system-on-chip (SoC) systems. Central to this transformation is the Bunch of Wires…