Our Team
Welcome to VeriFast Technologies
At VeriFast Technologies, we are leaders in delivering innovative verification solutions for the fast-evolving world of technology. Our mission is to empower businesses with robust, reliable, and rapid verification expertise that ensures your products meet the highest standards of quality and performance.
Mike Chandler
Mr. Chandler has more than 20 years of marketing and selling design services and EDA tools to the semiconductor and technology sectors where he has been responsible for generating more than $50M in revenue. He earned his Bachelor’s Degree in Strategic Management from California State University, Sacramento. In addition to his role as CEO at VeriFast, Mr. Chandler is also President and CEO of ASICSoft, one of VeriFast’s technology partners. Mr. Chandler is responsible for overall company vision, forging key technology partnerships, and directing the sales and marketing effort for VeriFast.
Mr. Nishith Shukla
Nishith has more than 2 decades of experience in semiconductor product engineering services. A technology leader with proven track record of delivering ASIC/FPGA/Soc Verification sign off. He has led and managed large engineering teams at several companies. He leads engineering execution and innovation, in addition to client services and relationship, and pre-sales support at VeriFast Technologies. Along with technical expertise in System Verilog/UVM based verification and Protocol likes PCI-Express, Ethernet, UCIe, Nishith has very good experience in managing projects with cross-functional teams & remote teams to derive Project Specification , Estimates and Deliverables. Prior to VeriFast Technologies, Nishith has held technology leadership roles in various companies like SoftNautics, eInfochips and Ebisu Technologies.
Mr. Rajat Goel
Rajat has 20 plus years of hands on technical and management experience in Design and Verification for developing semiconductor IPs and System on Chip (SoC). His experience includes computational architectures like x86, IBM-POWER, RISC V, multicore memory coherent designs for HPC and Automotive, and peripheral protocols like PCIe, CXL, UCIe, RDMA. He has past record of leading successful tape-out of IPs & SoCs. He has managed projects and teams across global sites in his past experience. He has hands on approach to mentoring, training engineers while leading engineering execution. Prior to Verifast Rajat has been with IBM, Synopsys, Freescale (now NXP), Applied Micro (now Ampere) and start-ups like Ventana and Scaleflux.
Mr. Luan Tran
Luan Tran comes with 17+ years of experience in front-end ASIC Design Verification with proven track record working on high-speed protocols such as USB4/PCIE5/CXL3.0/AMBA.